Power

Create power measurement techniques for various MLPerf benchmarks that enable reporting and comparing energy consumption, performance and power of benchmarks run on submission systems.

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Purpose


Power consumption and energy efficiency are critical challenges for deploying and operating machine learning systems across the spectrum, from battery-powered smartphones to the world’s largest data centers. The Power working group will create tools to measure power for machine learning systems to evaluate efficiency and guide system optimization and design trade-offs.

Deliverables


  • Power measurement techniques built on industry-standard tools
  • List of approved power analyzers
  • Power result metrics and format
  • Initial deliverable is integration with MLPerf Inference v1.0 for wall-powered systems
  • Roadmap for battery-powered system and MLPerf Training
Meeting Schedule

Tuesday December 24, 2024 Weekly – 15:05 – 16:00 Pacific Time


How to Join and Access Power Resources


Power Working Group Chairs

Chairs

To contact all Power working group chairs email [email protected].

Arun Tejus Raghunath Rajan

Tejus is a Technical Lead at Intel influencing Intel Products and IPs in the AI and HPC space. He has been at Intel since Summer 2011 and has experience in power modeling, post silicon power analysis and setting requirements for future Intel products. He has had experience in the Small Form Factor and wearables segments as well during this time. He has also served as the President of an Intel Employee Resource Groups helping drive mentorship and D&I efforts within the company. Prior to Intel, he was a Product Engineer at a university startup. Tejus has done his Master’s from the University of Utah in Salt Lake City and Bachelor’s from SRM University in India. Outside of work, he continues his passion for numbers and modeling by participating in soccer fantasy leagues and is an avid soccer fan.

Anirban Ghosh

Anirban Ghosh is a Senior Deep Learning Architect at NVIDIA focusing on HW and SW optimizations for High Performance AI Computing on GPUs and datacenter systems. Previously, he worked as a Field Application Engineer at Texas Instruments. He holds a master’s degree in Electrical & Computer Engineering from Carnegie Mellon University, and a bachelor’s degree from the National Institute of Technology Karnataka in India.